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1/11 may 2003 n high speed: t pd = 9ns (max.) at v cc =3v n low power dissipation: i cc =20 m a(max)atv cc =3.6v t a =85c n ttl compatible inputs v ih =2v (min) v il =0.8(max) n operating voltage range: v cc (opr) = 3.0v to 3.6v n a port have standard 4ma totem pole output n b port high drive source/sink capability of 14ma n support ieee std 1284-i (level 1 type) and ieee std 1284-ii (level 2 type) for bidirectional parallel communications between personal computer ant printing peripherals n translation capability allow outputsoncablesidetointerface with 5v signal n pull-up resistor integrated on all open-drain output eliminate the need for discrete resistor n replace the function of two 74lvc1284 devices description the 74LVC161284 contains eight high speed non inverting bidirectional buffers and eleven control/ status non-inverting buffers with open drain outputs fabricated in silicon gate c 2 mos technology. its intended to provide a standard signaling method for a bi-direction parallel peripheral in an extended capabilities port mode (ecp). the hd (active high) input pin enables the cable port to switch from open drain to a high drive totem pole output, capable of sourcing 14ma on all thirteen buffer and 84ma on peri logic output buffer. the dir input determines the direction of data flow on the bidirectional buffers. dir (active high) enables data flow from a port to b port. dir (active low) enables data flow from b port to a port. it is available in the commercial temperature range. 74LVC161284 low voltage high speed ieee1284 transceiver order codes package tube t & r tssop 74LVC161284ttr tssop pin connection www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 2/11 logic diagram note a: the pmos transistors prevent backdriving current from the signal pins to v cc/cable when v cc/cable is open or at gnd. the pmos transistor is turned off when the associated driver is in the low state. note b: the pmos transistor prevents backdriving current from the signal pins to v cc/cable when v cc/cable is open or at gnd. pin description pin no symbol name and function 1 hd high drive enable input 2, 3, 4, 5, 6 a9 to a13 side a input 8, 9, 11, 12, 13, 14, 16, 17 a1 to a8 side a input or output 19 pli peripheral logic input 20, 21, 22, 23 a14 to a17 side a output 24 hlo host logic output 25 hli host logic input 29, 28, 27, 26 c14 to c17 side cable output 30 plo peripheral logic output 41, 40, 38, 37, 36, 35, 33, 32 b1 to b8 side cable input or output 47, 46, 45, 44, 43 y9 to y13 side cable output 48 dir direction control input 10, 15, 34, 39 gnd ground (0v) 7, 18 v cc positive supply voltage 31, 42 v cc/cable cable power supply www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 3/11 truth table absolute maximum ratings absolute maximum rating are those value beyond which damage to the device may occur. functional operation under these condition is not implied recommended operating conditions input output output dir hd ll b1-b8 data to a1-a8 a9-a13 data to y9-y13 c14-c17 data to c14-c17 y9-y13 and plo open drain lh y9-y13 and plo totem pole hl a1-a8 data to b1-b8 a9-a13 data to y9-y13 c14-c17 data to c14-c17 b1-b8 y9-y13 and plo open drain hh b1-b8 y9-y13 and plo totem pole symbol parameter value unit v cc supply voltage -0.5 to +4.6 v v cccable cable supply voltage (must be 3 v cc ) -0.5 to +7.0 v v ia dc input voltage a1-a13, pl in , dir, hd in -0.5to+v cc +0.5 v v ib dc input voltage b1-b8, c14-c17, hl in -0.5 to +5.5 v v ibp dc input voltage b1-b8, c14-c17, hl in (40ns transient) -2 to +7 v v oa dc output voltage a1-a8, a14-a17, hl in -0.5to+v cc +0.5 v v ob dc output voltage b1-b8, y9-y13, pl in -0.5 to +5.5 v v obp dc output voltage b1-b8, y9-y13, pl in (40ns transient) -2 to +7 v i ik dc input diode current dir, hd a9-a13, pl in c14-c17 -20 ma i ok dc output diode current a1-a8, a14-a17, hl in 50 ma b1-b8, y9-y13, pl in -50 i o dc output current a1-a8, hl in 25 ma b1-b8, y9-y13 50 pl o =low 84 pl o = high -50 i cc or i gnd dc v cc or ground current per supply pin 200 ma t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c symbol parameter value unit v cc supply voltage 3.0 to 3.6 v v cccable cable supply voltage 3.0 to 5.5 v v i input voltage 0 to v cc v v o open drain output voltage 0 to 5.5 v t op operating temperature -40 to 85 c www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 4/11 dc specifications symbol parameter test condition value unit v cc (v) v cccable (v) -40 to 85 c min. max. v ih high level input voltage an, bn, pl in , dir, hd 3.0 to 3.6 3.0 to 5.5 2 v cn 2.3 hl in 2.6 v il low level input voltage an, bn, pl in , dir, hd 0.8 v cn 0.8 hl in 1.6 v oh high level output voltage an, hl 3.0 3.0 i o =-50 m a 2.8 v 3.0 3.0 i o =-4ma 2.4 bn, yn 3.0 3.0 i o =-14ma 2.0 bn, yn 3.0 4.5 i o =-14ma 2.23 pl 3.15 3.15 i o =-500 m a 3.1 v ol low level output voltage an, hl 3.0 3.0 i o =50 m a 0.2 v 3.0 3.0 i o =4ma 0.4 bn, yn 3.0 3.0 i o =14ma 0.8 bn, yn 3.0 4.5 i o =14ma 0.77 pl 3.0 3.0 i o =84ma 0.95 pl 3.0 4.5 i o =84ma 0.90 i i input current cn 3.6 3.6 v i =v cc 50 m a 3.6 3.6 v i =gnd (pull-up res) -3.5 ma all input except b or c 3.6 5.0 v i =v cc or gnd 1 m a i cc quiescent supply current 3.6 5.0 v i =v cc i o =0 0.8 ma v i =gnd (12xpull-up) 45 i oz high impedance output leakage current bn 3.6 5.0 v o =v cc 20 m a 3.6 3.6 v o =gnd (pull-up res) -3.5 ma a1-a8 3.6 5.0 v o =v cc or gnd 20 m a open drain y output 3.6 3.6 v o =gnd (pull-up res) -3.5 ma i off power off leakage current b, y output (to gnd) 0 5.0 v i or v o =0to7v 100 m a b, y output (to v cc ) 0 5.0 v i or v o =0to7v 10 m a v hys input hysteresis an, bn, pl in , dir, hd 3.3 5.0 0.4 v cn 3.3 5.0 0.8 hl in 3.3 5.0 0.2 z o output impedance b1-b8, y9-y13 3.3 5.0 v b =v oh 30 55 w r p pull-up resistance b1-b8, y9-y13, c14-c17 3.3 5.0 v b =v oh 1150 1650 w www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 5/11 ac electrical characteristics 1) skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either high or low (t oslh =|t plhm -t plhn |, t oshl =|t phlm -t phln | 2) parameter guaranteed by design capacitance characteristics symbol parameter test condition value unit v cc (v) v cccable (v) -40 to 85 c min. max. t plh t phl propagation delay time a1-a8 to b1-b8, a9-a13 to y9-y13 3.0 to 3.6 3.0 to 5.5 r l =500 w c l =50pf 1 7.5 ns b1-b8 to a1-a8, c14-c17 to a14-a17 r l =500 w c l =50pf 1 9.0 ns pl in to pl out r l =500 w c l =50pf 1 7.0 ns hl in to hl out r l =500 w c l =50pf 1 11.0 ns t pzh t pzl enable delay time dir to a 3.0 to 3.6 3.0 to 5.5 r l =500 w c l =50pf 112ns hd to bn, y9-y13 r l =500 w c l =50pf 1 8.5 ns t plz t phz disable delay time dir to a 3.0 to 3.6 3.0 to 5.5 r l =500 w c l =50pf 1 8.5 ns dir to a r l =500 w c l =50pf 1 8.5 ns hd to bn, y9-y13 r l =500 w c l =50pf 1 8.5 ns t r t f rise and fall time b1-b8, y9-y13 open drain 3.0 to 3.6 3.0 to 5.5 r l =500 w c l =50pf 1 120 ns t oslh t oshl output to output skew time (note1, 2) 3.0 to 3.6 3.0 to 5.5 r pull-up =500 w c l =50pf 12ns symbol parameter test condition value unit v cc (v) v cc/cable (v) t a =25c min. typ. max. c in control input capacitance (hd, dir, a9-a13, c14-c17, pl in ,hl in ) open open 4 pf c i/o i/o pin capacitance 3.3 5.0 6 pf www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 6/11 test circuit c l = 50 pf or equivalent (includes jig and probe capacitance) r l =r1=500 w or equivalent r t =z out of pulse generator (typically 50 w ) waveform 1: propagation delay input an to output (f=1mhz; 50% duty cycle) test s1s2s3 t phl (a1-a8 to b1-b8, a9-a13 to y9-y13, plh in to plh) (see waveform 1) open v cc v cc t plh (a1-a8 to b1-b8, a9-a13 to y9-y13, plh in to plh, hd to b1-b8, y9-y13, plh) (see waveform 1) open gnd gnd t phl ,t plh (b1-b8 to a1-a8, c14-c17 to a14-a17, hlh in to hlh) (see waveform 2) open gnd gnd t r ,t f (a1-a8 to b1-b8, a9-a13 to y9-y13) (see waveform 1) open v cc gnd t plz (dir to a1-a8) (see waveform 4) 6v gnd gnd t phz (dir to a1-a8) (see waveform 4) open gnd gnd t pzl (dir to a1-a8) (see waveform 3) 1.4v gnd gnd t pzh (dir to a1-a8) (see waveform 3) 4.4v gnd gnd t plz (dir to b1-b8) (see waveform 4) 6v gnd gnd t phz (dir to b1-b8) (see waveform 4) open gnd gnd www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 7/11 waveform 2: propagation delay input bn to output (f=1mhz; 50% duty cycle) v mo =50%v cc waveform 3: data to output enable and disable time (f=1mhz; 50% duty cycle) www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 8/11 waveform 4: dir to output enable and disable time (f=1mhz; 50% duty cycle) www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 9/11 dim. mm. inch min. typ max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.006 a2 0.9 0.035 b 0.17 0.27 0.0067 0.011 c 0.09 0.20 0.0035 0.0079 d 12.4 12.6 0.488 0.496 e 8.1 bsc 0.318 bsc e1 6.0 6.2 0.236 0.244 e 0.5 bsc 0.0197 bsc k0? 8?0? 8? l 0.50 0.75 0.020 0.030 tssop48 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 7065588c www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 10/11 dim. mm. inch min. typ max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 30.4 1.197 ao 8.7 8.9 0.343 0.350 bo 13.1 13.3 0.516 0.524 ko 1.5 1.7 0.059 0.067 po 3.9 4.1 0.153 0.161 p 11.9 12.1 0.468 0.476 tape & reel tssop48 mechanical data www.datasheet.co.kr datasheet pdf - http://www..net/
74LVC161284 11/11 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com www.datasheet.co.kr datasheet pdf - http://www..net/

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